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The Design And Implementation Of Digital If Reciver Based On Three Different FPGA Chips

Posted on:2010-08-11Degree:MasterType:Thesis
Country:ChinaCandidate:S Q ZhangFull Text:PDF
GTID:2178360278459058Subject:Communication and Information System
Abstract/Summary:
FPGA (Field Programmable Gate Array) is widely used in the hardware design of wireless communication field, with many advantages such as short research and development period, little investment and being modified repeatedly, and intellective EDA tool and so on. To the FPGA engineers, it is worthy to deeply study that how to realize the needed module function at more effective while under the situation of fully using existing FPGA resource.This thesis firstly introduces each module of Intermediate Frequency Receiver which is used in actual application, then compiles each hardware description language which is respectively mapped to three different FPGA chips, and finally gets the relative conclusion by the fitter report of the EDA tools.Nowadays, the main FPGA suppliers are ALTERA and XILINX. This thesis takes the three most popular FPGA chip as the example from the two suppliers: the low end equipment Cyclone III and high-end Stratix III of the company ALTERA, the high-end equipment Virtex-5 of the company XILINX. According to the feature of Intermediate Frequency module, this thesis gets the conclusion by analyzing respective basic FPGA unit, DSP Hardcore and the module characters like inline RAM of the three equipments at detail, and by comparing and analysis.The Intermediate Frequency Module is realized through digital which includes: Digital Frequency Shift Module, intermediate decimation filter module and matched filter module, etc. wherein intermediate decimation filter can be realized through CIC (Cascaded Integrator Comb Filter) and HBF (Half-Band Filter) according to different situation. Because different Modular Architectures means the difference of function and resource at FPGA realization, it is important to fulfill FPGA design based on analyzing respective feature of the module. When the same modules are realized on different FPGA device, what we should pay attention is how to perfectly map the hardware description language to each device after having carefully studied FPGA device. There is difference to the realization of FPGA product between the different device companies or between the different series products of the same device company. After having seriously analyzed the craft product of the three 65nm FPGA chips of the two companies, this thesis analyzes the realization way's difference of the same module to the Intermediate Frequency Digital Receiver. At the same time, HDL code was developed under the premise of different designs, and finally the function and consumption difference was getten when different devices realize the same function module according to fitter report of the EDA tools. At the last part of this thesis, a suit of Intermediate Frequency Receiver applied in the system on FPGA device of the two different companies have been realized respectively and finally arrive at a conclusion according to comparison of function and resource. Finally, the whole receiver system is tested on-board and is validated.
Keywords/Search Tags:FPGA, Digital Intermediate Frequency Receiver, Device feature, fitter report
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