Design And Realization Of Phase Locked Loop Under Three-phase Unbalance Voltages

In order to assure power electronic devices such as grid connected inverter and STACOM of running normally under unbalance voltages, distortion and sag, it is necessary to study high-performance phase-locked tracking technology to obtain the phase of positive sequence components quickly and accurately. Design and realization of phase-locked loop (PLL) technique under unbalanced grid voltages are investigated in this thesis. Following are some aspects included in the thesis:Firstly, the background and significance of research work are introduced, a comprehensive summary of the working principle and the types of PLL as well as its development status is given, and the basic requirement of the grid-connected converters for PLL technology is summarized.Secondly, based on the structure and operation principle of the single synchronous reference frame software PLL (SSRF SPLL), the mathematical model of SSRF SPLL has been derived, the steady and dynamic performance of SSRF SPLL are analyzed, and its tracking errors under these distorted utility conditions are investigated. The simulation model of SSRF SPLL is established by means of PSCAD/EMTDC software, and simulation results indicate that the phase-locked accuracy under unbalance voltages is not so good as it is expected.Thirdly, according to the design concept of decoupled double synchronous reference frame (DSRF) SPLL under unbalanced utility voltages, the decoupled expressions of positive and negative sequence components of the voltage vectors are derived on the DSRF. The analysis of the signals on the multiple SRF axes permits to design a decoupling network which isolates the positive and negative sequence components, and this decoupling network gives rise to DDSRF SPLL structure which detects the positive sequence voltage components accurately and quickly. Simulation results indicate that the PLL is able to eliminate effectively the unbalanced input voltage disturbance and ensure high-performance output.Fourthly, the operational principle of symmetrical component method-based EPLL-SSRF SPLL, which uses enhanced phase-locked loop (EPLL) and calculate unit to derive positive sequence voltage components, is presented. The structure model of EPLL-SSRF SPLL is established, and the impact of the dynamic parameters on its performance is studied. Simulation results have verified the good performance of EPLL-SSRF PLL under the voltage distortion.Finally, the hardware platform for three PLLs is built up by designing the detection and conditioning circuit for three-phase AC voltages and phase output circuit, and using C8051F410 MCU as the control unit. The program structure of PLLs, the flow chart of their main programs and interrupt service programs are given, and the corresponding C codes are programmed after the measures to improve real-time efficiency of algorithms are introduced. The hardware test and software debugging of the system lead to the function implementation of three PLLs mentioned above. Experimental results prove that the theoretical analysis and simulation results are correct and feasible.