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Research Of Soft Phase Locked Loop Based On Non-ideal Condition Of Voltage

Posted on:2012-03-12Degree:MasterType:Thesis
Country:ChinaCandidate:Y ZhangFull Text:PDF
GTID:2178330338997116Subject:Electrical engineering
Abstract/Summary:PDF Full Text Request
With the level of science and automation increasing, more and more advanced power electronic equipments are used in the power system. The performance of these equipments in power grid is concerned by more and more people.The phase signal of grid voltage is usually used by most of the control circuit in these equipments. So, in order to make these equipments work in the right condition, we must design the excellent circuit of phase synchronization to track the frequency and phase of power grid. Specially, the more excellent circuit of phase synchronization should be designed in non-ideal conditions of voltage. as a result, the circuit of phase synchronization is a key part of power electronic equipments. In other words, the performance of synchronization technology directly affects the dynamic and static performance of power electronic equipments.The phase locked loop(PLL) is a common circuit because of its outstanding characteristic amid lots of circuit of phase synchronization. Especially, with the Digital age coming, the soft phase locked loop(SPLL) which is stable, economical, flexible shows up. So, how to obtain the phase signal needed by power electronic equipments becomes a focus of researcher.The paper starts with the principle of three main blocks in PLL: phase detector,loop filter, voltage control oscillator. So, their mathematical models are derived, and based on these models, the working process of PLL is elaborated. At last, Some kinds of traditional synchronization technology of phase are analyzed.Based on the advantage and principle of SPLL, two kinds of SPLL are analyzed in detail. The performance of the two SPLLs in non-ideal conditions of voltage(voltage sag, phase jump, frequency offset, imbalance voltage) is verified by matlab/simulink. From the simulation, there is a conclusion that the performance is bad in imbalance voltage with frequency offset. For the drawbacks of the two SPLLs, a kind of improved SPLL based on frame transformation is proposed, and the principle of the SPLL is analyzed. At last, making use of the simulation proves the validity of the improved PLL.Select the three-phase voltage source PWM rectifier as the research object, and make it as the application object of improved SPLL. Firstly, the mathematical model of PWM rectifier is derived, and based on it, the control circuit is designed. At last, though the simulation, there is a conclusion that the improved SPLL not only has good performance in the ideal condition, but also makes the PWM rectifier work in the unit power factor in condition of frequency offset.At last, the experimental system is designed based on the C8051f410 series SCM to further prove the feasibility and validity of improved SPLL. At the part of software, the program flowcharts of three kinds of SPLL are designed and based on the C Language, the programs are writed. At the part of hardware, the sampling circuit, conditioning circuit and D/A circuit are designed. And based on it, the waveforms of hardware are tested.
Keywords/Search Tags:Non-ideal conditions of voltage, Soft phase-locked loop, PWM rectifier, Reference frame transformation, Single chip microcomputer
PDF Full Text Request
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