Since patterning technology in the sub 100nm regime was introduced into the semiconductor industry,Resolution Enhancement Technologies(RET) such as Optical Proximity Correction(OPC) has become a standard practice to compensate the pattern transfer distortion gap between the physical designer and the lithography engineer.On the other hand,Design for Manufacturing(DFM) is being widely accepted as one of the keywords in cutting edge lithography and OPC technologies,which alleviates complex interactions between design and manufacturing.DFM solutions impact the design-to-silicon flow at various stages,often during different time-points in the product life cycle, and often with both process equipments and metrology tools.In this thesis,the pre-OPC RET implementation methodology that can be integrated into the tape-out flow is proposed.It includes the hybrid sub-resolution assisting feature (SRAF) implementation methodology by using the process window aware OPC model,and the process window based double exposure methodology.As a complete mask synthesis flow,these RET methodologies including OPC alleviate the potential challenge brought the shrinking technologies.Another contribution of this thesis is the proposal of a general OPC concept that stands for Optical and Process Correction.As the drive of the semiconductor industry towards smaller features sizes requires more sophisticated correction method to guarantee the final tolerances in both the wafer manufacturing and mask making,A DFM approach is proposed to compensate the process proximity effect that arises from the thick film overlay metrology. |