| Moore's Law, which is the guide for IC manufacturing for more than 40 years, is a human creativity law instead of physical law, and continuous development of science and technology keeps Moore's Law continuously valid, especially that the development of lithography and RETs (Resolution Enhancement Technologies), which is the key process of IC manufacturing, greatly reduces the distortion in manufacturing. As one of the most widely used RETs, MB-OPC (Model-Based Optical Proximity Correction) has become an essential step in sub-wavelength lithography. ILT (Inverse Lithography Technology) is believed as a new generation of RETs for 45nm,32nm and even 22nm lithography. DfM (Design for Manufacturability) provides a platform for the communication between designers and manufacturers, and aims at fixing the manufacturing-error-prone spots at the layout design stage. The main contents and innovations of this paper focus on the following three aspects, MB-OPC, ILT and DfM modeling.Model-based dynamic self-adapting dissection and model-based mapping between segments and correction sites in OPC. Dissection of the polygon edges and the mapping between segments and correction sites are two critical steps in MB-OPC. To ease the quality reduction caused by dissection recipe that is hard to write and debug, a recipe-less and automatic dissection method is proposed in this paper. This method dissects the segments in accord with the rhythm of contour through contour sampling and corresponding calculation, and then adjusts the segments in correction loops. The simple one-to-one mapping between segments and correction sites are not suitable for nano-lithography, and to solve the problem, a mapping model is proposed in this paper. The mapping model inspects the areas that contribute most to the central intensity to determine the mapping. Experiments show that the two techniques improve the accuracy of MB-OPC and make it a better performer in nano-lithography. Hot-spots aware ILT and seamless-merging-oriented parallel ILT. ILT uses optimization methods to obtain the pixel-based mask through massive calculations, and it is highly accurate but time-consuming. Hot-spots aware ILT proposed in this paper can locate the hot-spots late in the optimization process, and fix the hot-spots layout alone while keeping hot-spots clean layout unchanged to reduce the calculation, and give the information about the latent hot-spots. Seamless-merging-oriented parallel ILT proposed in this paper adds convergence penalty terms in cost function to fix the problem that the changing environment and simple merging may induce hot-spots, while reaping the benefits of high speed inherited from parallel computing. Experiments show that the two kinds of ILT increase the speed without sacrificing the quality.Modeling of kernel-based DfM model. A new kind of kernel-based DfM model is proposed to describe the process from original layout to silicon contour. The kernel elements in this model are obtained through optimization, thus the model has more freedoms and high accuracy; no process parameters are used in modeling explicitly, so the model can be released to designers; and the contour can be predicted by the model directly from original layout without layout correction steps. Experiments show that the model has good accuracy and makes the DfM check of layout in designer side possible.
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