Fpga-based Network Router Packet Exchange Algorithm And Realization

Along with the incessant expansion of the modern internet scale and rapid increase of data stream on net, traditional router can not meet to the requirement of the data exchange and routing. Presently the new generation of router has used the exchange type of routing technology generally, and utilized the exchange backboard in order to make the full use of the public correspondence link, enhance the use factor of the link effectively, and make the parallel correspondence of each correspondence node possible. The hardware system design unifies respective characteristic of the private network processor and the programmable component, uses the design method of based on structural modulation of ASIC, FPGA, CPLD hardware. The appearance of GSR based on the ASIC technical system causes the performance of the router enhancing greatly. But this kind of router mainly satisfies the transmission request of the data service (letter, image), and can not solve the entire service (voice, data, video). So the contradictory becomes more and more prominent along with expansion of the network scale. The new generation of router based on the technology of network processor gives the method of solving the problem existing in GSR system.The router based on the network routing technology use the realizing mode of switch FPGA hardware, realizes data communication between network router and outer data chip for receiving and dispatching by routing all kinds of single broadcast and multi broadcast data packets in router. The article analyses the exchange algorithm used in the traditional switch FPGA aiming at the characteristic of data transmitting flow in router, gives an improved algorithm of SLIP in order to eliminate the thrum block when data transmits aiming at the thrum block produced in general FIFO algorithm by combining the characteristics of void output queue (VOQ) mechanism and queue arbitrate arithmetic (RRM) and according to each outer meeting chip in practical design. The article also gives the practical solving project aiming at the differ between the single broadcast and multi broadcast data packets transmitting, analyses and gives the solving project for the utilizing of cache bandwidth of SSRAM out of FPGA, the chaos of data packets when transmits and the managing flow circle data packets in FPGA. The exchanging performance of router...