Design And Research Of Based On Switched-current ∑-△ Modulator

According to the mechanism and the math model of the clock feed through of the basic SI cell, this paper presents a new clock-feed through compensation scheme that needs a simple circuit architecture and simple clock system. With the same transistor dimensions and process condition, simulation indicates that the error current of the proposed switched-current memory cell is less than that of the basic switched-current memory cell. Based on the high-performance SI memory cell, this paper presents a full differential second-order switched-current Sigma-Delta modulator. This paper analyzes the system transfer function and noise energy in detail. Optimum designs of fundamental circuits of the modulator are also carried out. Then the switched-current Sigma-Delta modulator system is designed and simulated. The measurement indicates that the resolution of the modulator is 9bit,SNR is 52.7dB,DR is 51dB and when the power supply is a single 3.3V, the clock frequency is 512KHz and the oversampling ratio is 128。...