Study And Design Of Two Order Sigma-delta Modulator

ADC connects analog with the digital world. There are various types of ADCs at present. The traditional ADC, such as successive approximation, flash-type and pipeline and so on, need high-performance pre-filter to prevent aliasing noise. Also high-precision electronic components of the converter could be easily influenced by integration and temperature factors. As a result of this above, it is difficult to improve traditional ADCs' accuracy. In other words, it will hold back the realization of high-resolution converters.To avoid these problems, the sampling technology has been used in ADCs design. Sigma-delta ADC has several advantages, including high resolution, anti-jamming capability, small quantization noise and good linearity. The analog circuit of Sigma-delta ADC can achieve perfect compatibility with digital circuit without the accuracy requirements. So Sigma-delta ADCs are widely used in high-resolution audio and Mixed-circuits which will be able to lower the cost of high-precision ADCs. Now sigma-delta ADC is used primarily for audio applications and data acquisition aspects.The paper had made a deeply analysis about the basic principle of sigma-delta modulator. Based on this analysis, a two order Sigma-delta modulator which has 16 bits resolution has been turned out. At first the different structures of the sigma-delta modulators are compared based on MATLAB soft and SIMULINK toolbox. From the analyse of above, a two-order modulator with 1-bit quantizer has been chosen. The modulator is implemented with fully differential switched-capacitor circuits, 10 KHz input, a sampling rate of 256, up to 98dB dynamic range. On the basis of the a behavioral level simulation of the whole system, the discussion will begin by exploring the RTL level design of various circuit block in the modulator, i.e, switched-capacitor integrator, telescopic cascode two-stage operational amplifier, clock-control comparator, clock generation circuit,etc. Simulation results show that OTA achieves a 94dB open-loop gain, a 84M bandth and a 73°phase margin. The turn-on resistance of the switch is 3K and is almost independent of the input. The delay of the comparator is less than 40mV. The parameters satisfy the requirements of the modulator. In the end, the layout design of the telescopic cascade operational amplifier is shown.The circuit simulation and layout design are based on SMIC0.18um1P4M CMOS process by Cadence EDA tools. The area of the telescopic cascode two-stage operational amplifier with common feedback is 0.91 *0.79mm~2 .