Design Of Structure And Data Traffic Interface Of Signal Processor For External Illuminators Based Radar System

External illuminators based radar system, which does not transmit electromagnetic wave itself, is covert and hard to be discovered by enemy reconnaissance system, for it detects and tracks targets by receiving the echo of external illuminators of opportunity, scattered from aircrafts. The thesis is mainly a study on the realization of the signal processor for external illuminators based radar system. At the beginning, this thesis introduces the flow of signal processing about the signal processor, including adaptive filtering, delay-Doppler processing, constant false alarm rate processing and distance calculation. Then, hardware circuit of the signal processor is explained, including the structure of the circuit and the connection between the circuit boards. How to design a parallel processing algorithm which is suitable for the structure of this processor is an emphasis here. In the following chapters, this thesis introduces several effective DMA transmitting modes which are used in the signal processor. The realization of the data traffic interface between FPGA and TS201 through the bus and the link port is elaborated in detail. At last, this thesis explains the realization of the data traffic interface between FPGA and the display terminal emphatically and other inner functional modules are also mentioned here. In addition, it discusses the power-on booting procedure of TS201 and the code structure of booting program is given in this thesis.