Some Key Circuits In RFID CMOS Tag

Passive RFID tag is widely applied in logistics fields, for its small size and low cost. In the thesis, two key parts in a passive RFID CMOS tag system, including the voltage reference and the programmable memory, are studied.Based on BJT temperature feature and MOS temperature feature, two voltage references are designed, respectively. Resistive subdivision method is adopted in BJT voltage reference design, and a output voltage lower than 1V is generated. In the MOS voltage reference design, a novel low voltage high precision current mirror is introduced to improve the precision of the output voltage.A high voltage charge pump in a NVRAM with standard CMOS logic technology and a full EEPROM is studied, respectively in the thesis.A novel process variation compensation circuit is introduced in the charge pump of NVRAM, so the stability of the output voltage is improved.In the low power EEPROM design, several methods are introduced to reduce power consumption. For example, the read mode is series mode which means to read data by bit. In the analog part of EEPMOM, the oscillator output frequency is pre-regulated before driving the charge pump by using dynamic biasing circuit, which lowers the system power consumption effectively.