Research Of PLL Frequency Synthesizer For 802.11 Transceiver

As a kind of low power, low cost and short range wireless communication technology, WLAN is at it's fast development, and the frequency synthesizer is one of the most important parts used in transceiver. In this paper, the PLL frequency synthesizer system is deeply researched for WLAN wireless transceiver and parts of the circuits are designed in top to down design method.This paper focus on the analysis of PLL frequency synthesizer theories first, and then the mathematic models of the system and all the parts are researched, so as the stability and noise shaping characteristics. Based on the analysis, a scheme of PLL synthesizer is designed for the WLAN transceiver, which is composed of three PLL frequency synthesizers, the output frequency of this synthesizer system is range from 5.8 GHz to 6.7 GHz, and change in step of 0.05 MHz. It has the advantages of high distinguish and low phase noise. The fractional PLL synthesizer, which is one of the three synthesizers is designed, including the parameters of the system, and functions of each part. At last, the system has been simulated with Matlab.The circuits of phase detector and charge pump are improved. The phase detector circuit is designed to work in high frequency and the dead zone of this circuit is reduced. Based on the analysis of interference factors, a kind of current controlled charge pump is designed, which is capable of avoid some of the phase noise produced by charge pump.The model of fractional PLL synthesizer is designed in Matlab with the tool of simulink. The characteristic of this system is simulated, which prove that the fractional PLL synthesizer is capable of work steadily and get into lock state quickly, the lock time is 300...