The Design And Realization On UHF Phase Locked Synthesizer

Frequency synthesizer is widely used in the current electronic equipment, and even considered as "the heart" of many electronic systems. The frequency synthesizer with lots of channels, low noise and high tuning width using theory of phase-locked loop is the critical part of the modern communication equipment, so the design of high performance frequency synthesizer is very important research field in the modern communication technology.In this paper, a PLL frequency synthesizer working in UHF band is researched. At first, we review the basic of phase lock loop and PLL frequency synthesizer. After that mainly introducing the charge pump PLL with a passive loop filter in detail. Then emphasizing the modern phase frequency detector with charge pump and its advantages and investigating the impacts of PLL performance on communication system performance. By building up the modeling of phase noise, reference spur and lock time ,it is helpful to design passive loop filters in the next part. Because VCO determines the outside band phase noise of synthesizer, designing a high performance VCO is the crucial part of this paper, basic conception of VCO and the method that using EDA tools to design VCO was introduced in detail. After that, the EDA design result was provided. Finally introduced the practical circuit of frequency synthesizer that using MCD8825 chip with a passive loop filter and provided the real test result of VCO and PLL frequency synthesizer, compared the test result with simulation result and concluded that the agreement between the theory and practical..Realizing a PLL frequency synthesizer with 30MHz working band and 25KHz frequency step. In addition, some problems often occurred was introduced, and resolved.