Design Of The Timing Circuit For A Color CMOS Image Sensor

CMOS image sensor is a kind of solid-state sensor which integrates photoelectricity detection, analog to digital converter and control circuits. CMOS image sensor has developed quickly because it applies CMOS process and research results of various solid-state image sensor techniques. It has become the key facility of image processing technology and been applied to a great many fields such as video camera, digital camera, mobile communication, safeguards, car airbags and fingerprint identification because of its low power, high reliability, small size and low price.The system design and implementing method of the controlling circuit of image sensor are discussed in this thesis. First, in allusion to the image sensor with three-transistor pixel architecture, pipeline DPGA and ADC, the roll exposure timing is designed. Second, the master and slave of I2C are designed. In this design, the slave uses system clock to deal with the bus signal, so the reliability of the system is enhanced. FPGA verification is passed independently. Third, the constraints of synthesis are beyond the request about 20%. The clock tree is designed manually. In the design of controlled circuits, the semi-custom and full-custom design methods are used together, and it satisfies the request of mixed-signal circuits in CMOS image sensor. In the Verilog code design, synthesizable code is adopted to describe functional modules, and more flexible style is used to compile test bench. The results of simulation after P&R, STA and FPGA verification indicates that the function is absolutely right, and it satisfies the specs. There is a innovation in digital noise suppression in this thesis, quiet period sampling and gated clock are adopted in timing and circuit design, and disadvanteous influence of digital noise to analog circuits is decreased.