Design And Implementation Of The Control Circuit For CMOS Image Sensor

This thesis is one part of the Crucial Science and Technology Project of Tianjin City:"Design of the CMOS Image Sensor with High Performance and Large Dynamic Range". CMOS image sensor has developed quickly due to its mature producing technics and research results of solid image sensor. It has become the key facility of image processing technology and been applied to a great many fields such as video camera, digital camera, mobile communication, safeguard, car airbag and fingerprint identification. The accomplishment of this project can settle a strong base to design other ASICs and implement system integration, and the products will have a wide market.The system design and implementing method of the controlling circuit of image sensor are discussed in the thesis. In allusion to the image sensor with dual-sampling pixel architecture, the timing functions of parallel exposure mode and roll exposure mode are detailedly narrated and analyzed. With roll exposure mode, the structure of pixel cell is simplified, the double sample storage is shared by one column. As a result of that the exposure time can be adjusted widely and finely, the dynamic range is improved. Following Top-Down IC design method, the design is divided into several sub-modules, and they are described in Verilog.In the process of verification, the FPGA of Cyclone sery of Altera is adopted. On the pass of FPGA verification, post simulation is used. Then tape out in Charterd 0.35um process. The test system is builded. The chip passed the test. The image is explicit.