Design And Implementation Of Pre-process Digital Circuit For CMOS Image Sensor

With the improvement and innovation of semiconductor technology,the CMOS technology image sensors have more in-depth research and development.Domestic and foreign research institutions and commercial companies are increasingly interested in the CMOS image sensor.The investment funds are also increasing year by year.CMOS image sensor chip as an important image acquisition components,has a huge commercia l market,the annual increase in market demand is an important reason for its widespread use CMOS image sensor in the circuit integration and power consumption and other advantages,is the CCD image sensor can not match.This makes the CMOS image sensor in mobile devices,digital cameras,safety,security monitoring,aerospace and other fields of application more and more,but the CMOS image sensor in the image quality and noise control there is an inherent weakness.This paper is aimed at CMOS image sensor of the above problems,CMOS image sensor Pre-Process circuit as the main research object.First,using a FPGA development board platform and MIS100 X series of 130 W pixel CMOS image sensor for image acquisition,collecting RAW format image data for verifying the algorithms,while studying the mainstream CMOS image sensor pixel unit,and MIS100 X series image sensor timing and driver,in order to accurately capture the required image data.After analyzing the important parameters of the pixel unit of the CMOS image sensor,the main noise source,and deducing the relevant noise formula,this paper focuses on the biggest factors that affect the image quality: dark current,dead pixel,row noise and column fringe noise.Based on analysis of the advantages and disadvantages of existing methods,a method of noise suppression based on digital circuit is proposed,and the RAW data collected by the chip are used to verify the method in Matlab software.The black level cancel,dead pixel cancel,row noise cancel,column fringe noise cancel algorit hms are verified,and the final result is expected to achieve the desired effect.This paper use the Verilog language to realize the description of hardware circuit.Depending on the processing of digital front-end design,writing the RTL code,and a detailed description of each module the input and output ports,data flow,function block diagram.Finally the Pre-Process RTL code is verified by a platform which is used for MIS100 X chip top simulation.According to the function and timing of the Pre-Process circuit,the verification scheme is established,and the RTL code is simulated by the testcase,tested by FPGA.All the results meet the design expectations.