Design Of Low Voltage Multistage Amplifiers Based On 0.5μm CMOS Technology

The advancement in integrated circuit (IC) technology has resulted in scaling down of device sizes and supply voltages without proportionally scaling down the threshold voltage of the MOS transistor. Associated with the transition to low voltage circuit design is a demand for frequency compensation techniques that are dedicated to the new context: compensation strategies which decrease the power consumption, but above all which are capable of handling the specific demands of the low voltage and low power amplifier topologies.The operational transconductance amplifier (OTA) is a basic building block in most analog and mixed-signal electronic systems. In this paper, we will design a high gain,wide bandwidth multistage amplifier driving large capacitive load which serves as error amplifier in low-voltage and low-power condition. Based on the basic theory of operational amplifier, this paper first introduces the general parts of the amplifier and many kinds of frequency compensation technology. And this gives necessary basic theory for this work .Then we explain the whole design procedure, introducing phase margin as main design parameter.Three-stage amplifier is implemented by a standard 0.5-μm CMOS process and simulated with Hspice. When driving a 500-pF capacitive load, the amplifier achieves 110-dB dc gain, 1-MHz GBW, 60°phase margin, and 1.1V/us average slew rate, while only dissipating 0.18-mW power at 1.5V supply. All the simulation results are satisfied with pre-defined specifications.