The Research Of VLSI Floorplan Algorithm And Thermal Model

Hierarchical approaches are employed in current floorplanning algorithms for scaling to large number modules. With the development of VLSI technology, the thermal problem has been emerged as one of the key issues for IC design.In this thesis, some problems have been studied such as VLSI floorplan/placement and thermal model of VLSI. The main algorithms of the floorplan/placement in VLSI physical design include simulated annealing algorithm, cluster and partition based algorithm. We present a quick method which uses the Gaussian-siedel iterations to compute the thermal model. We propose three different power density clustering methods and an efficient hierarchical iterative thermal model to guide the optimization of floorplanning. It aims to efficiently reduce the hot spots while optimizing design metrics such as area and total wire length. The incremental Gauss-Seidel thermal model is proposed to estimate the thermal effects efficiently. The experimental results with GSRC T2 fioorplan bookshelf benchmarks show that the thermal effect is well controlled which leads the temperature of "hot spots" decreasing on the chip under the power density clustering strategies. Among these three strategies, the greedy balance clustering approach is the most effective and stable. The iterative times of our incremental thermal model is approximate 1/5 to the inverting matrix method. The contributions of this thesis include:Power density clustering is proposed to keep global optimization by hierarchical thermal model. Thermal model is modified to avoid boundary hotspot between clusters in hierarchical floorplanning.A Gauss-Seidel relaxation iterative method is embedded in the hierarchical thermal model, which is an efficient algorithm that can reduce the run-time by speeding up the convergence with accurate estimation. Especially, the Gauss-Seidel iteration is suitable for incremental temperature updating. Compared with inverting matrix method, our method can be five times faster.Through the power density clustering and hierarchical thermal model, the maximum temperature of modules is decreased, approximating the modules' average temperature. Incremental thermal model is an efficient method, the GS_times is about 1/5 iterative times of inverting matrix method.Future works is how to speed up the thermal model and proposes the hierarchical thermal model in min-cut floorplan/placemnt.