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The Study And Implementation Of Viterbi Decoder In IEEE802.11a

Posted on:2009-10-27Degree:MasterType:Thesis
Country:ChinaCandidate:D H FuFull Text:PDF
GTID:2178360245496504Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
As one of the pop techniques in Error Control Coding under digital base band pro-cessing system, the convolution code technique based on Viterbi algorithm has beenwidely applied in various digital communication systems such as GSM,3GPP,DVB,ATSC,WLAN and so on. As the main develop trend of tomorrow mobile telecommu-nication, WLAN is developing towards high speed,low power dissipation and facilityconnect. As the key technique of 4G, OFDM technique is applied in IEEE802.11a pro-tocol to achieve high speed WLAN. As a very important section of base band processingsystem in the protocol, the decode speed and power dissipation of Viterbi Decoder hasthe crucial a?ect of the whole system.On the background of IEEE802.11a WLAN base band processing system of certainproject, a new type of Viterbi decoder based on OFDM system in the protocol is studiedand Implemented.OFDM modulation technique in IEEE802.11a is analyzed,and the Error CodingControl is discussed. The following innovations are proposed basing on investigatingon traditional Viterbi decoder: 1. A new type of add-compare-select structure is givento accomplish high speed and low resources; 2. High speed decode rate is achieved byadopting creative trace back method.A new type of radix-4 Viterbi decode is implemented on the basic of simulatingthe proposed methods in Matlab. Several parts are discussed in detail, they are: theMatlab simulation of improved Viterbi decode algorithm, ascertain of the hardwareparameter, the optimization of the hardware structure and analysis of the simulationresult of hardware design, finally study and implementation are carried out on FPGAto ASIC design, and also low power dissipation design and the testable design arediscussed.The highest speed of the implemented Viterbi decoder rate is 108M on XilinxSpartan3-4000 series FPGA, and the decoder has been used in certain WLAN baseband process part, and perfect result is achieved.
Keywords/Search Tags:Error Control Coding, Viterbi Decoder, OFDM, low power dissipation, testability
PDF Full Text Request
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