Transplantation And Optimization Of H.264 Encoder Based On TMS320DM642

The H.264/AVC standard developed by the JVT which is formed by the VCEG belonging to the ITU and the MPEG belonging to the ISO/IEC is a new international video compression standard. Comparing with the former video standard just like MPEG-1, MPEG-2, MPEG-4, H.261 and H.263, H.264 improves the encoding efficiency and quality largely by adopting the strongpoint of the former video standard and bringing forward a lot of new idea and arithmetic. However, the high efficiency leads to a high algorithmic complex. The complex of the H.264 main profile decoder is three times of the MPEG-4 simple profile decoder and the encoder is ten times. Therefore, the H.264 CODEC can not be used directly because of its high algorithmic complex. As a result, it is very important to optimize the algorithmic.The TMS320DM642 Digital Media Processor (DM642) is a high-performance fixed-point DSP from Texas Instruments. The DSP core processor has 64 general purpose 32-bit registers and eight highly independent functional units which including two multipliers and six arithmetic logic units (ALUs) with VelociTI.2 extensions. The DM642 uses a two-level cache-based architecture and has a powerful and diverse set of peripherals.The main task of this thesis is to transplant and optimize the H.264"baseline"encoder software on the DM642 Digital Media Processor. The much more complex arithmetic caused by the improvement of the performance makes the H.264 encoder can not be used directly. We made a lot of optimization including memory optimization, arithmetic optimization and assembler optimization to realize the real-time encoding. In the end, our H.264 encoder is optimized to provide 18~23 fps encoding performance for QCIF resolution video.