The Research Of 2D-DCT Processor Based On FPGA

Discrete Cosine Transform are wildly used in coding and decoding of image processing. So far, it has adopted by many international standards like JPEG, MPEG1.MPEG2, MPEG4 and H26x etc. It's difficult to satisfy the requirement for real-time by software owing to its heavy quantity of computing. Therefore, we used to adopt hardware circuits to satisfy our requirement for speed in many practical applications. The content of the thesis researching is that hardware implementation of 8X8 2-DDCT IP core for application of image processing.The thesis introduced principle and effect of DCT in image processing at first, and elaborated the image processing which use DCT transform. And analyzed and studied various fast algorithms of DCT, summarized the working for DCT fast algorithms which has done by previous researchers. The thesis presented a way of DCT hardware implementation. The way adopted pipeline architecture and changed 2-D DCT to two 1-D DCT based on characteristic of row-column decomposition. In the design of 1-D DCT, we reduce the number of rom by optimizing the data and since we know the value of DCT cosine coefficients, by making use of its rotation characteristic, multiplication function can be designed by shift and addition logic (DA)instead of direct multiplication unit by which can save resources while improve the speed. At last, synthesize and verification for design has been done.The result shown that the design could complete the function of 8X8 DCT under 80M clock frequency on the chip of EP1M350F780C5 which belongs to Altera company.