Design And Implementation On FPGA Of Modulator Of DVB-S/S2

Digital HDTV integrates the most advanced image compressed encoding technology and the digital transmission technology. It has become one of the focuses in the high-tech competitions of the world. Concurrently, accompanied by the boom in all kinds of technology, VLSI is full developed. Among them, the channel processing system and its related chips combining the core technologies as DSP, FEC(Forward Error Correction), turn out to be the key parts for the design and development of digital television systems.In this regards, this thesis, with the channel processing system of satellite digital television as the research object, applying the internationally accepted DVB-S/S2(Digital Video Broadcasting - Satellite) standards, studies a range of problems on the implementation of the above system at the transmission end.Firstly, the thesis provides a review of the development & standards of digital television, especially to the develop of satellite digital television in China. After that, from the angle of digital communication system, the thes is gives an analysis of some basic principles of DVB-S channel processing system, including digital baseband signal processing, and error control codec. Then we perform the simulations of the two systems and the Backwards Compatible modes, which are based on the Matlab. At the last, we expound on the FPGA-based DVB-S modulator channel coding and modulation, including function-based module decomposition, as well as module-specific analysis of working principle and algorithm, HDL description, timing simulation and FPGA realization. Channel coding and modulation is the core of DVB-S/S2 modulator. By virtue of FPGA's advantages in digital signal Processing, he paper gives detailed analysis on the realization of algorithm for several key modules, including RS coding, convolutional interleaver, convolutional coding, BCH codes and LDPC codes, and the algorithm is verified by HDL description and timing simulation.The research of this thesis covers almost all the aspects of DVB-S channel processing system. The implementation of this system will contribute to the development of digital television.