Channel Coding/Decoding Researches Of The Spread Spectrum Asic Chip And Methods Of FPGA Realivation

The thesis mainly discusses the channel coding/decoding algorithms of the design of the spread spectrum ASIC chip and researches the truth and methods of FPGA realivation relatively.Nowadays, the IEEE 802.11b standard for wireless area network suggest apply the SS technique into its physics layer. Under such circumstance, it is of great significance to develop the spread spectrum ASIC chip. The spread spectrum (SS) communication system has strong ability of resisting interference than that of conservation communication systems. And it also has the characteristics of low probability of intercept and multiple access secure communication. The characteristic of wireless channel is very intricacy. So, channel coding is an obligatory and very important methods of chip'improved steadiness.With the understand of the theory of spread spectrum communication, a channel coding scheme—series cascading code and twice interleaving, is introduced in the paper. The series cascading code is make up of outer code—(15,9,4) Reed-Solomon code, and inner code—(3,1,2) convolutional code. The interleaving is block interleaving which degree is 4. A detailed discussion of the time-domain iteration decoding algorithm of Reed-Solomon code and the Viterbi decoding algorithm of convolutional code is given . At last, the founction simulation of the channel edcoder/decoder and the methods of FPGA realivations are completed in the peper.It is shown by computer simulation that this channel coding scheme could preferably improve the synbol error rate of the simulation system.This paper is arranged as following: Chapter 1 mainly introduces the history and background of the SS communication system and the development related to SS ASIC chip at present in the world. It also introduces the outline of thesis. Chapter two describes the base principle of the SS communication system, including the definition, the theoretic foundation, and classification of the SS communication system,and mathematical aspect of the direct sequence SS (DSSS) . Chapter 3 introduces the theory, classes, and characteristic of channel coding. In Chapter 4, we carry out the selected channel coding scheme, discuss the theory, encoding algorithm,and decoding algorithm of Reed-Solomon code and convolutional code. At last of Chapter 4, we give the parameters of the selected channel coding scheme. The symbol error rate of the system with channel coding is caculated by computer simulation in Chapter 5 to show the performance. The idea and solutions for developing the SS communication system using FPGA are given in the chapter 6. The section introduces the development flow of FPGA and the tools for the project. Then the analysis and the implement detail for channel coding/decoding modules, both transmitter and receiver unit, are given in the section. The summary of the thesis and the possible extensions and improvements based on the DSSS system are presented in the chapter 7.