Study Of Ultra Wide Band Low Noise Amplifier With CMOS Process

High speed ultra-wideband communication and low cost are significant directions of the development of wireless communication technologies nowadays.On the other hand,as the first stage of wireless receiver,low noise amplifier plays an important role in the communication system.So the research of ultra-wideband CMOS LNA is imperative under this situation。The key component of wide-band wireless applications-wideband low noise amplifier(LNA)based on advanced CMOS process was exactly researched in this thesis.The aim of this thesis is to design and simulate high performance wide-band LNAs.Based on numerous references and TSMC 0.18μm CMOS process,this thesis chose proper topology to furture analyse and study two novel UWB LNAs.Firstly, simulat the TSMC's NMOS with ADS and choose the right parameter from the results to start the work.Secondly,designed two kinds of UWB CMOS LNA with the topology of cascode with source inductor degeneration and common source under TSMC 0.18μm CMOS process.The LNA achieved less than 4dB noise figure and 12dB gain in the pass band with less than-10dB input and output match.The power dissipation of the LNA were merely 30mw.At last,the layout was designed with Cadence Virtuso.