An 8-bit Ultra-fast Two-step Analog-to-Digital Converter Based On 0.18μm CMOS Process

A/D converter is the key device of advanced communication, radar, sonar and many consume electronics. As the ligament between analog signal and digital processing, the high performance A/D converter is more and more important for the whole design system. In recent years, the speed of the read channel of data storage, such as HDD and DVD, has increased very rapidly. Accordingly, the speed requirement of ADC has also increased. The high-speed medium or low resolution application, full flash architecture has been considered the only possible architecture. However, it is difficult to use conventional full flash architecture for a high-speed 8 bit resolution application. Its resolution and speed degrade, because of the high input impedance, a large number of comparators. The input impedance doubles as resolution increases by 1 bit.Based on analysis of many kinds of ultra-fast A/D converter architecture and consideration of resolution and speed, the paper choose the two-step architecture as research subject of ultra-fast A/D converter.In order to overcome the speed restriction due to the input impedance, save chip areas, reduce power consume, a new two-step ADC based on flash architecture with interpolation has been designed. The new architecture, which has multiple THAs and an analog switch matrix, enables us to have an equivalent pipeline operation, thus to obtain digital output at each clock period. Because of the necessity of the ultra-fast ADC, such as offset,bandwidth of the analog blocks that are vital for the system design, detailed analysis and optimization for analog blocks ,high-speed time-interleaved THA and ultra-fast comparator has been designed in this paper. Simulation uses SMIC 0.18μm CMOS mixed-signal process. At 800MSamples/s, the paper designs all circuit blocks , simulates their function and verifies the converter's 8-bit resolution.