Research On High Precision ADC Error Extraction And Correction Technology

In recent years,the rapid development of the integrated circuit industry has caused continuous challenges to the performance of ADCs.High-precision ADC,as one of the most important indicators of ADCs,has encountered unprecedented challenges.With the continuous improvement of ADC's precision requirements,various impacts caused by environment,process,and design issues are also increasing.The radiation environment will bring about the single event effect(SEE).When the high-precision ADC is applied to various radiation environments,its precision and the stability of various performance parameters are worth considering.Take the successive approximation analog-to-digital converter(SAR ADC)as an example.The key factors affecting its accuracy are capacitance mismatch,comparator noise,offset voltage mismatch,clock jitter,and other factors.The greater the influence of the configuration factors,the research on the correction technology of the high-precision SAR ADC becomes particularly critical.The traditional digital background correction method has certain drawbacks.Normal correction can only be carried out under normal operation,especially when key modules such as DAC capacitor array are not affected by external factors such as radiation,otherwise the correction result will produce huge errors.Therefore,this paper proposes a digital correction technology for radiation-resistant analog-to-digital converters based on three-mode redundancy(TMR).The three-channel ADCs system can greatly reduce the impact of the SEE effect caused by the radiation environment.Under normal circumstances,the average value of the three-channel output is the final result of the output,but when the ADC output of one of the three channels is compared with the other two channels.The output is significantly different due to the influence of SEE,so the output adopts the average value of the other two channel ADC outputs.For high-precision multi-channel ADCs,the capacitance mismatch error,gain error,and offset error of each ADC must be corrected.This article mainly adopts the method of jitter injection.The three-channel ADC injects positive and negative dither respectively to divide the output curve trajectory of the three-channel ADCs.Using the difference of the conversion results of the three channels,the LMS algorithm is used for weight correction.This paper designs a 16-bit SAR ADC structure to verify the correction method.Under the power supply voltage of 5V,the standard deviation of the power supply offset is 30 m V,the standard deviation of the comparator input voltage offset is 30 m V,and the unit capacitance mismatch is 3%.Adding 30% of the probability of occurrence of SEE effect,and then using Monte Carlo 300 simulations to find the average value,ENOB finally rises from 7.91 bits to 15.07 bits after correction,and SFDR rises from 56.67 d B to 113.59 d B after correction,SNDR rose from 49.37 d B to 92.46 d B after correction.