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Research On 8-bit CPU Hard Core Design

Posted on:2009-01-10Degree:MasterType:Thesis
Country:ChinaCandidate:H JiangFull Text:PDF
GTID:2178360242989232Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
With the development of semiconductor technology and system design technology, the technology of SoC is widely used in embedded system now for its advantage, and become the inevitable trend of development of integrated circuits. SoC chip is a complex system. In order to complete the design within the stipulated time and increase the reliability of the design, IP-based method must be used in SoC design. Hard IP core get the attention of the IC industry because of its reliable performance and easy to use. At the same time, hard IP core of embedded microprocessor is widely used in various applications.The design methods for CPU hard core are mainly researched in this paper. An 8-bit CPU hard core occupying 3.254mm~2 is presented in 0.18μm CMOS. It consumes 65.397mW under 100MHz clock frequency.At first, the architecture of 80C51 is described detailedly. Constraints of logic synthesis and design methods of layout are two key points in the design flow for hard IP core. They are focused in the paper. At last, an approach is proposed for designing CPU hard core based on SoC.
Keywords/Search Tags:SoC, Hard IP Core, Microprocessor, Logic Synthesis, Layout Design
PDF Full Text Request
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