High Performance MAC Design In MCU

High performance MCU is the core components of the digital system as now more and more electronics and its applications adopts MCU. In the past of several years computer science,DSP,image processing,micro controller and processor need high speed multiplier so the multiply should be achieved by the hardware. Generally, the multiply is high cost and low speed furtermore the frequency of the processor is determined by the operation of the multiply. The speed and area is essential to the multiplier design. In the past tens of years, high performance multiplier techniques and theories have been brought out.The thesis centers on my company's MCU IP core, which is the series of 8051. We improved the ALU by adapting the high performance multiplier (MAC). Based on from top to down ASIC system design flow and modules partition, we used VerilogHDL hardware description language to realize MAC of the DSP function at the MCU so that it can improve MCU's digital processing capability. We used EDA tool Verilog XL to do the simulation and Design compiler to come true the synthesis. Then Verilog-XL is used to simulation the devices after synthesis and some part of layout design is also shown.Regarding IP reuse requirements, I analysis the MAC unit configuration,circuit and arithmetic. Then I design 8 bit MAC IP core. We also embedded the IP core to the MCU to enhance its arithmetic function. As the MAC design, we set out the special and effective method to save the resource and cut down the delay. We construct the simulation platform then generated the interface module and testing codes, as well.The suggested design ideas and methods are all emphasis on the IP reuse,prick off,generalization and correction. It will be reference to VLSI research and IP improvement to the company.