The Research And Design Of High Performance DDS Signal Generator

Direct Digital Frequency Synthesizer makes it possible to generate single phase or quadrature sinusoids over bandwidths measured in hundreds of megahertz, with fast frequency switching, fine fine frequency tuning resolution, phase-continuous frequency switching, which has been widely used in both communication systems and sensor applications now, Design challenges include maintaining high spectral purity,hign clock rates and low power consumption. But the traditional DDS based on ROM mainly limits the converting speed and power consumption of DDS, thus we need find a novel method to design it.This thesis first presents a new Amplitude compression technique,which achieves a saving of 4 bits per ROM word. Then a novel DDS architechture is presented, this DDS is based on 8 linear segments interpolation of the function.NO ROM and multipliers are used. System complexity is greatly reduced by using an efficient linear interpolation scheme to approximate a sinusoid function. Which optimizated can achieve upper speed, less chip area, the design are synthesized for a 0.18um CMOS library and a simulation is done. finally attachs the SFDR about -60dBc with a 150 MHz clock and occupies 0.05 mm~2 area,improving the performance of DDS system.