Design And Verification Of X Microprocessor's Interrupt System

The modern microprocessor communicates with the peripheral system by the interrupting system. The frequency of high-performance microprocessor increases fast, interrupting system must match to the microprocessor. This thesis presents the architecture of the interrupting system of the X microprocessor and verifies its correctness.In the X microprocessor, interrupting request proposed by the peripheral can be deliveried to the processor core through three ways, i.e., local interrupt pins, 8259A programmable interrupt controller and advanced programmable interrupt controller (APIC) system. The local pins can delivery special interrupt request to the processor core except INTR. The APIC system is consisted of three parts, Local APIC, I/O APIC and APIC bus. The X microprocessor integrates the Local APIC on chip. In essence, the APIC system integrates the function of the external 8259A programmable interrupt controller, 8253/8254 timer, and adds the function of inter-processor's interrupting process in the multi-processor. This paper discusses the interrupting system of Pentium family microprocessor, designs an interrupting system of the X microprocessor, and verifies its correctness on the verification flat base on verilog hardware description language. In addition to the above research, we assert the local interrupt request in port and analyze the result of simulation if the interrupt system of X microprocessor match the design specification. By the way, this paper has designed the Local APIC of X microprocessor,and has verified various process manner by programmable the registers of Local APIC in the flat of verifacation.