SoC Interrupt System Design And Verification Of Mobile Phone Baseband Chip

Following the law of Moore's,the semiconductor industry gets a rapid development.The IP reuse technology is widely used to increase on-chip integration capability,as a result,the complexity of So C structure continues increasing,which brings enormous difficulties and challenges for the design and verification of digital IC.Interrupt system is an essential part of the So C,it can assist the system in dealing with communication work between the periphery devices and CPU.With more and more modules and devices are integrating in system,it becomes more and more complex.As a consequence,the design and verification work is also becoming more and more difficult.This thesis focuses on two things:first,helping CPU flexibly control the interrupt requests,and reduce its dynamic power consumption;Second is how to improve the efficiency and reliability of the verification.In order to facilitate customer controlling different kinds of interrupt requests and processing various kinds of interrupt requests in a flexible way,this thesis designs a programmable interrupt management module to full fill the demand.And this thesis also adds an interrupt delay controller into the system,which could improve the work efficiency and reduce dynamic power consumption of CPU.The designed system could insure all the interrupt requests gathered and triggered in a system-ideal way,and also gets a great reuse abilities,which could reduce the inconvenient brings by changing design,lower the labour of the designer in different projects.The programmable interrupt delay controller could help APIC?SPCU and CPU manage more than two hundred interrupt requests from diverse modules in chip.And the delay of the interrupt request makes the processing work of CPU becomes more concentrated and avoid the unmeaning awake of multi-core CPU,which could improve the processing efficiency and lower the dynamic power consumption.For the aspect of verification work,this thesis using perl script realized the automatic generating of the module-level testbench for the project,which not only improves the reliability of the code,but also greatly decreases the time cost of the verifier to adjust the testbench after every design changing.The script could be reused in other project by little modification.Besides,to insure the validity of the design and the completeness of the verification,this thesis using function simulating and formal verification crossing verify the designed module.This thesis designs the interrupt system of a baseband chip,uses different ways to verify the design,and analyzes the further research dirextion.At present,the design of the SCU interrupt management module and interrupt delay controller in this thesis has been successfully applied in the whole system,the automatic generating testbench technology gets mature and stable,which can be used for different projects.The chip is successfully taped-out,and already used in iphone7.