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Design Of Interrupt System Applied To High Performance DSP

Posted on:2019-10-14Degree:MasterType:Thesis
Country:ChinaCandidate:Y R YanFull Text:PDF
GTID:2428330545965002Subject:Electronic and communication engineering
Abstract/Summary:PDF Full Text Request
With the continuous development of electronic information industry,the digital signal processor(DSP)have been widely used in the fields of aerospace,communications,and industrial control,and DSP will move toward high performance,low power consumption,and expand multiple applications.Interrupt system as an important part of the DSP,which control the communication between the peripherals and the DSP core,its stability,practicality is directly related to the status of the DSP system,so the interrupt system has become one of the important factors that relate to the performance of DSP.This project comes from a domestic DSP chip which applied in the field of industrial control,on the basis of expounding the basic concept and working process of the interrupt system,an interrupt system that meet the requirements of this chip is designed.The DSP chip has abundant peripherals in it,and the interrupt system needs to meet the needs of many peripheral interrupts.Thus,a three-level interrupt system with two-level vectors is proposed as an implementation scheme.The three-level interrupt adapts to interrupt requests from a large number of interrupt sources well,and the two-level vector are the "ID" of CPU-level interrupts and peripheral-level interrupts respectively.The hardware part of the interrupt system uses a top-down,hierarchical,and modular design approach.In the first,top-level hardware circuit structure of the interrupt system is designed.Then the three-level structure of the interrupt system--peripheral level,PIE level,and CPU level--are designed separately.The DSP core uses an eight-level pipeline structure and proposes an exact interrupt that is compatible with the pipeline architecture.The exact interrupt allows the interrupt response to be performed immediately without waiting.This method helps to increase the efficiency and flexibility of interrupt system and can reduce the complexity of the design of core.The simulation of different interrupt events was performed to verify that the design achieved the expected results.Then the chip which was taped out is tested to prove the feasibility of the designed interrupt system.
Keywords/Search Tags:DSP, interrupt system, three-level interrupt structure, pipeline, exact interrupt
PDF Full Text Request
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