The Design And Realization Of 1.25GHz High Performance PLL On PCI-Express

Phase-Locked Loop (PLL) has been widely used in various sequential systems because of its unique frequency-multiple and phase-lock. As integrated circuits frequency exceeds GHz, the skew and jitter of system clock has been requested more strictly, so PLL design encounters great challenges. One typical application of High speed PLL is to produce PCI-Express clock and maintain its synchronization, PCI-Express requests that the clock have high stabilization and very low jitter.After researching the PLL theory thoroughly, this paper has designed and realized a mixed 1.25GHz PLL IP core by full custom design based on 0.13μm technology, which is applied to PCI-Express. The post-layout HSPICE simulation indicates that the PLL works correctly, and all kinds of circuit parameters achieve the initial high levels.The major research work and invention of this article is including as follows:1. Study the principle of charge and discharge on charge pumps, and eliminate the current overshot through voltage follower, at the same time, this paper has employed a method with parallel bypass capacitors, which restrains the charge and discharge current pulse effectively.2. Study the lock state of PLL, a lock detect circuit is designed by combining the charge and discharge principle and the characteristic of Schmitt trigger, thus the circuit performance is met.3. By analyzing the characteristics of various oscillators, a 1GHz~1.5GHz high performance oscillator is implemented through matching designs and adopting the three-stage differential structure.4. Employ the delicate correcting principle about duty-cycyle in PLL design, so the duty-cycle of PLL output maintains about 50% without divided by 2, which has greatly reduced the difficulty of designing oscillators.5. Study the layout design of mixed PLLs, then give PLL-layout matchings and safeguards that all analog circuits need. As a result, it avoids much noise interfering. The layout post simulation shows it works well.6. Study the test of high-frequency mixed PLL , we hope to test it afterward.