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Design Of The GPIB Controller Based On ENET

Posted on:2008-02-11Degree:MasterType:Thesis
Country:ChinaCandidate:C X XuFull Text:PDF
GTID:2178360215959109Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
With the rapid development and broad application of computer technique, network and communication, the test by means of network has been increasingly emphasized. It must bring about revolutionary changes in the field of measurement. The saying 'Network is Instrument' generalizes the trend of networked instrument and measurement. Configuring the networked automatic test system not only enables us to share more resources and reduce the cost used to configure the traditional system, it will also strengthen the function of the test system, broadening the range of its application.The technique of Ethernet is the most prevalent computer network technology. It has the advantages of higher communicational rate, simpler protocol and lower hardware price. GPIB instrumental system gives a good example by combining modern measurement and computer. It is a measurement system; in the system, the instruments are interconnected through the outer bus of computer. It follows an IEEE488 standard, which is the first choice for configuring the ATS. Based on the Ethernet, GPIB instruments can realize resources sharing and remote instruments accessing in a local area network. A high efficient ATS by means of GPIB in the LAN can be configured and the rate of its usage can be greatly improved.After referring to quantities of technical books,researches in integrate circuit's development around the world and the facts from our staff room, the author puts forward an idea to design a GPIB control chip by using ASIC technology. In the paper, the background and significance about designing a GPIB controller based on Ethernet is firstly introduced. Then, the whole design idea of the controller is elaborated emphatically, followed by an introduction to the GPIB protocol. The design and realization of the GPIB controller bas(?)d on CPLD/FPGA are also described in details.The sketch of the GPIB controller is originated from the building block design. By using Verilog HDL, we accomplish the block design and emulators programs with Quartus after it is synthesized by Synplify. The building block design includes state machine realization, data channel design and the interface to MCU. In the end, the function of GPIB controller is achieved by the Electronic Design Automatic lab development system and the author summaries the findings and gives suggestions for further scientific researches.
Keywords/Search Tags:FPGA, GPIB controller, state machine, data channel
PDF Full Text Request
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