Font Size: a A A

Design And Implementation Of Gpib Controller Chip

Posted on:2005-10-12Degree:MasterType:Thesis
Country:ChinaCandidate:Q YuFull Text:PDF
GTID:2208360125464332Subject:Measuring and Testing Technology and Instruments
Abstract/Summary:PDF Full Text Request
ISP (in-system programmable) technology is used in many field with the development of integrate circuit these years. With the age of SOC coming, ASIC component of FPGA/CPLD can satisfy the require of design of SOC, what' more, it has the special virtue of programming in system. GPIB controller is widely used in automatic test field, for it's the core chip in making up the test system. The design and realization of the GPIB controller base on CPLD/FPGA will be described in details this theme. The process in accomplishing the GPIB controller can be divided into the following steps: the realization of state machine (SM), the design of data channel and the interface to MCU.Basing on the building block design thought, we split the whole system into some little modules, and using the VerilogHDL to accomplish them. After all the modules were finished, the system can be installed by linking all the module's symbol together. The design of state machine is the key point. Chapter one introduces the background and significance about The GPIB controller basing on CPLD/FPGA.Chapter two introduces central idea of the GPIB controller. Chapter three introduces the GPIB controller interface function, especially the designing of state machine according to IEEE-488.Chapter four introduces the designing of data channel. Chapter five discusses how to accomplish the whole GPIB controller design.The GPIB controller basing on IEEE-488 protocol has been used in the interface cards of ETHERNET-GPIB and USB-GPIB.
Keywords/Search Tags:ISP, CPLD, GPIB controller, state machine, IEEE-488
PDF Full Text Request
Related items