The Design And Realization Of The DDR Controller In The Digital Image Processing System

Memory controller is mainly used to control the memory inside the computer system and exchange data between processor and memory. It determines the memory performance of the computer system, imposing a great impact on the whole performance of the computer.At present, in the high-speed data collection system, the analog signals should be first changed into digital signals, then stored in the memory first, and finally dealt with accordingly. However, for relatively high conversion rates of high-speed A/D, the operating speed of ordinary high-capacity SDRAM can not match with the output speed of A/D converter, which influences the reliability and the real-time of high-speed data storage. DDR with higher speed and bigger capacity, also known as DDR SDRAM, is built on the basis of ordinary SDRAM, and widely used in high-speed data acquisition System because the use of double data rate structure improves the performance of DDR SDRAM. But for its interface not compatible with current microprocessors, complicated control logic, as well as strict requirement for timing, DDR SDRAM is not user-friendly.This paper, combined with the specific projects, against the backdrop of applying mass storage in large-format high-performance color scanner, based on the in-depth analysis of DDR's working principles, presents a design method for DDR controller on the basis of FPGA to realize the goal of storing data with high-speed and high-capacity. Through DDR controller the communications among internal memory, digital signal processor (DSP) and Field programmable gate array (FPGA), can be achieved. At the same time data can be stored with higher speed and bigger capacity during the process of collecting digital images.