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A Design Of EEG Collecting System Based On FPGA

Posted on:2008-07-03Degree:MasterType:Thesis
Country:ChinaCandidate:J Q HouFull Text:PDF
GTID:2178360215496525Subject:Computer application technology
Abstract/Summary:PDF Full Text Request
Electroencephalogram(EEG) is a weak signal of bioelectricity, a general reflection in the cortex or on the scalp when brain nerve cells transmit information.Usually use electrodes that are placed in the pallium and on the scalp to gain low EEG signals. And then a connecting of electrode is used as a coupling to differential amplifiers. Finally, the EGG recorder is applied to record and analyse the signals in order to the deeper processing.This thesis introduced how to design hardware and software to capture, enlarge, collect, display and record the EEG signals, and how to analyse and process the signals in hardware.In chapter one, that mainly introduced the basic knowledge and classification of EEGAlso expatiated the characteristic of wave and frequency on EEG signals, and then introduced how to fix EEG electrode and the connecting way of EEG. Chapter two discussed the details on the scheme of every part based on the whole design in order to choose a better design. Firstly, the scheme was divided into two parts: analog and digital circuit. Secondly, it demonstrated the process method of the analog signal in detail on the basis of the characteristic of EEG Finally, the basic design way is confirmed on the hands of the signals collecting, displaying and the method of communicating with PC.In chapter three, that introduced how to design and make the amplifier. EEG is microvolt signal which must be enlarged to satisfy with the demand of collecting system. And then designed the three amplifiers and calculated the gains of every part. The results were validated through simulation at the end of the paper.EEG signal is so weak that can be interfered by strong noise easily. So chapter four introduced the design of the filter circuit detailedly. Firstly, the band pass circuit filtered the signals outside EEG. Secondly, applyed trap circuit to get rid of 50Hz signal, calculated the parameters of each part and explained the result of simulation. Finally, tested the whole circuit includes amplifiers and filters to analyse its capability. Considering that the next class circuit can interfere with the previous one.Chapter five introduced how to isolate the two classes, and applyed photoelectricity isolation to isolate the two. This part analysed the principle of feedback photoelectricity isolation circuit and the way of adjusting circuit. In the end of this chapter, applied the strangulation circuit to convert the negative polarity signals into the positive and simulated the result.The signals after conversion were transferred to collection circuit. So how to choose the ADC chips, connect with FPGA and control the chips to collect signals were introduced in chapter six. Ghapter seven introduced how to design a filter to transfer these signals to other parts of the circuit on the foundation of FPGA.A branch of the signals was transferred to LCD to display, the other was to PC to save the data. Chapter eight introduced how to display the EEG on LCD. Firstly, explained the LCD's structure, timing and connecting with FPGA. Secondly, explained the fundermental of displaying dynamic wave on LCD.Finally, programmed to realize the dot's display of LCD. At the same time, the paper explained how to control the key to display the stable wave by timing.How to realize the communication between USB and FPGA was introduced in chapter nine. Based on the USB's structure and connecting with FPGA, then studied how to apply FPGA to realize the receiving and transmitting. Then program was to realize that PC controls the receiving and transmitting and saving the data.In the end of this paper, expatiated on the existent issue and the improved advice.
Keywords/Search Tags:EEG, FPGA, Collecting, LCD, USB
PDF Full Text Request
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