Design Of Speech Collecting And Denoising System Based On FPGA And Lifting Wavelet Algorithm

As voice related technology is widely used in the production of life and scientific research, acquisition speed and processing effects of voice raised higher and higher. Speech signals can easily be noise in the transmission, often resulting in subsequent processing of the speech signal deviation. Therefore, Study on speech denoising technology has important practical significance. Wavelet analysis because of its good time-frequency analysis and multi-resolution analysis, can effectively extract the signal of the useful information in the field of speech denoising has been widely used.This paper makes FPGA chip parallel processing feature and USB high-speed data transmission characteristics combine to enhance the collection and processing speed of the speech signal. At the same time on the basis of existing wavelet de-noising algorithms, we focus on lifting wavelet threshold denoising algorithm in Speech Denoising. By choosing a suitable wavelet base, decomposition level, lifting wavelet thresholding strategy to enhance the effect of de-noising algorithm using matlab platform for voice denoising system is verified. Focus on the wavelet denoising algorithm implemented in hardware, and design lifting wavelet denoising bior2.2 voice system on FPGA.The system uses DSP Builder and verilog HDL combined to build the FPGA portion of the entire speech acquisition and de-noising system. DSP Builder architecture in Matlab/Simlink graphic design platform, which connects algorithm simulation modeling and hardware implementation design up. It can be algorithm graphical design and simulation on the Simlink of matlab, followed by SignalCompiler model design files after a comprehensive compilation converted into a hardware description language is downloaded to the FPGA to complete the algorithm of hardware design. This article is the use of graphic design benefits of DSP Builder completed lifting wavelet thresholding building blocks and shorten the algorithm design cycle.This paper mainly completed the following aspects of the work:(1) Its lifting wavelet Wavelet in Speech Denoising system to do the research, and detecting lifting scheme wavelet de-noising performance by matlab platform.(2) Use the DE2 board and USB chip built hardware platform for the entire speech acquisition and de-noising system.(3) Complete audio codec chip control module, lifting wavelet denoising algorithm module, USB interface chip control module hardware programming in the FPGA.(4) Designed USB interface chip firmware to achieve the set operating mode of USB chip.(5) Prepared a system PC software, PC software that work together with the hardware platform to realize the collected after denoising speech signals stored on the PC and monitor.