Building An 8-bits RISC Microcontroller In An FPGA

Micro-Controller Unit (MCU) is the key component of many digital design. To design a successfully MCU with our own intellectual property is not only a challenge but also our pursuing ideal and goal because MCU is very complicated in structure and calls for high requirement in such aspects as robust, area, speed, power and so on . The subject of this thesis-Building an 8-bits microcontroller in an FPGA is just a helpful try and practice with this methodology. After studding and research the instruction set, the architecture, the work sequence of AT90S1200 which is basic type 8-bits RISC MCU of the AT90S series of Atmel Corporation for a long time. Observing the basic principle of design the architecture and sequence of the simply MCU .and forward try to design the basic module of the MCU basing on the basic EDA design principle using from top to down.Compared the deference between RISC and CISC. The instruction set. The instruction pipe-line with 2 level and the conflicts because of pipe-line. The MCU top module and the way using FPGA for complicated sequence design.The design of this paper including: the datapath and control unit of the MCU using VHDL.the function simulation of the MCU with software.The datapath design including: the PC module, the IR module, the general purpose register file module, the SR module, the ALU module, the fetch unit, the timer module, the I/O module, the external interrupt module; the control unit is desgned with a FSM.The verification stage is using different program to obtain the same function to verify parts of the important instruction type and the whole function of the MCU. Verification the basic instruction type. All this type is the basic function type of the MCU, after the verification, the MCU can deal with the basic function.The result of the simulator verify the designed RISC MCU is compatible with the AT90S1200, the assemble of the verify program can be assumed by AVR studio that need not write our own compiler. All the result indicates that the timing of the RISCMCU is well and the pipe-line is work as designed.