Design And Implementation Of SoC Based On RISC-V Architecture

RISC-V processor architecture has the characteristics of completely free and open documents,simple architecture,companies and individuals can customize the extension instruction set according to the requirements,etc.RISC-V instruction set architecture has more advantages and has been widely used in So C(System on Chip)design.Processor architecture based on RISC-V,this paper designed a supported RV32 IM instruction a subset of the processor core,it includes 47 basic integer instructions and 8 extended integer multiplication and division instructions,The core of the processor adopts the simplified three-level pipelining technology to design,and has the function of static branch prediction.The main core modules include pipelining module,pipelining control module,interrupt exception module and debugging module.Based on the processor core,a So C platform is integrated.The peripheral modules of the So C are interconnected through Wishbone bus,and the memory structure of Harvard structure is adopted to separate the instruction memory and program memory.On the RISC-V So C platform based on integration,the Software Development Kit(SDK)supporting it is developed,which mainly includes the Board Support Package(BSP)and some Software examples,and the Windows Graphics Integrated Development Environment(IDE)is built based on Platformio,it is convenient to develop embedded software based on the So C platform.In order to simulate and verify the system function of RISC-V So C,a test platform,Testbench,was created to simulate the function of the processing kernel and each peripheral module.Then an integrated So C FPGA prototype platform was implemented based on FPGA,and the system was verified at board level.Finally,the corresponding software example and Coremark program are run on the FPGA prototype platform of the So C.The operating frequency of the So C is 50 MHz,its Coremark score is 2.2,and it can run the Free RTOS operating system.