Research And Design Of The Driving Circuits For TFT-LCD

In the thesis, the design is performed for the drive circuit of the 600×800 resolving power of TFT-LCD with 64 gray scale displays. There are two parts of the peripheral integrated drive circuit, and they are the gate driver and the source driver. The gate driver is made up of the shift register, level shifter and output circuit. It can realize the turn-on of the TFT non-interlaced in 60Hz frame frequency. The source driver includes the bidirectional shift register, the encoder, flip-latch, DAC and output buffer. The DAC is carried out through coding method. The input data is separated into two parts, the high-order 3 bit and the low-order 3 bit. They are coded and assembled to get the exact voltage value. The circuit of DAC is predigested and the working frequency of data transmission is up to 28.8MHz. Rail-to-Rail operational amplifier works as the voltage follower to enhance the capability of driver loads. The display area is divided up for the sake of saving area of the chip. The data is transmitted with odd and even number impulse. The number of DAC in each section is reduced to 6 so the area of the chip is reduced greatly. The processing of this design uses the chartered 0.35 um standard CMOS technique. The circuit is simulated with the CAD tools of Cadence. The result of the simulation shows that the drive circuit can satisfy the target of the TFT-LCD on the whole. Finally the layout of some circuit is presented.