Automatic Generator For Arbiters In Communication On Chip

As more and more components are being integrated in one SoC system, the communication on chips is becoming more and more important in SoC designing. As the key component of the communication on chips, the design of arbiter is becoming the kernel of SoC designing. The main work we have completed in this paper is as follow: Firstly, we do some research on three commonly used algorithms of arbiter designing which are Round-Robin, TDMA and Lottery algorithms. Secondly, we finish the hardware designing of these three arbitors; What we have done next is to complete the design of automatic generator for macrocell of arbiters in communication on Chip; Finally, we analyze the performace of these three arbiters. This paper is an important part of the research - the key technology of the communication architecture on SoC, which belongs to System-on-Chip Research Center, at Harbin Institute of Technology Shenzhen Graduate School.Generally speaking, this paper includes the following parts:(1) Research on algorithms of arbitration. We focus on three commonly used algorithms in communication on chips and their improved algorithms which are Round-Robin, TDMA and Lottery algorithms.(2) The hardware designing of arbiters. According to the method of arbiter's hardware designing, we completed the hardware designing of Round-Robin, TDMA and Lottery arbiters by two methods of RTL code's implementation. The RTL code implemented by the first method doesn't have the function of parameter transmission. On the opposite side, the RTL code implemented by the second method can realize the port configuration by parameter passing.(3) The design of the automatic generator for macrocell of arbiters. We have designed two RTL code libraries corresponding to the two mthoeds of RTL code's implementation. Because the RTL code designed by the first method can't pass parameters, we design the RTL stencil by the Perl language to implement the port configuration. The generated macrocell of arbiter contains the RTL code, TESTBENCH, auto simulation script and auto synthesis script.