Design And Realization Of An 800MSPS FADC Digitalization System

The Data Acquisition is a pivotal part of digitization of nuclear instruments and an absolutely necessary component of Digital Signal Processing. With the development of technology of modern nuclear detection and promotion of speed of nuclear signal, it is required to improve the speed of Digital Acquisition System (DAS). Moreover, the progress of technology of Flash Analog-to-Digital Converter and Field Programmable Gate Array make the design and realization of High Speed Data Acquisition System more feasible.Based on the application of Flash ADC, the author discusses the design of a High Speed Data Acquisition System. The system sampling rate is 800MSPS and resolute is six bit. The data is transmitted to FPGA, which implements the frequency demultiplication, amplitude discrimination and time information acquisition. In the end FPGA sends data to the computer with TELL1 readout board and Gigabit Ethernet link.Because of high frequency signal, the design of high speed circuits is different from that of low ones, especially in Signal Integrity (SI) and Power Integrity (PI) to which should be paid more attention. The principle of high speed circuit design is detailed in this paper; additionally, the approach to design the DAS with simulation software and high speed EDA tools is also introduced.At last, the author explains methods of measuring performances of High Speed Data Acquistion System. In addition, the performances are evaluated and analyzed.