Design Of High Speed Data Acquisition And Storage Circuits

Data acquisition and storage is very important in signal and information processing system, and plays an important role in industrial production and scientific research. With further development of information science, the task of signal processing is becoming more and more onerous and the high performance request of data acquisition is becoming more and more urgent. The storage system must store data with higher speed and precision. Because of the development of ADC and FPGA, and the widely use of SDRAM, the design and realization of high speed data acquisition circuit become feasible.At this background, this thesis brings forward a solution of high speed data acquisition and storage circuit with the high-speed ADC and the FPGA to be the core, the DDR2-SDRAM to be the large-capacity cache, the ATA hardisk directly embedded into the data acquisition card, combined with the USB bus technology which can achieve both online and offline operation. The sample rate of the system reaches 1GSPS, the precision is 8bits and the storage depth is 1GB.As the control center of the circuit, FPGA is responsible of the control of the devices, the receiving and deceleration of sample data, cache the data to the DDR2-SDRAM, finally storing the data to the hardisk, or you can transfer the data through the USB interface to a computer for subsequent analysis and processing.The design of high speed circuit is different from the low speed circuit. The problem of the SI(Signal Integrity), PI(Power Integrity), EMI and so on should be cared about. This thesis introduces the rules of the design of high speed circuit.