Design And Analysis Of Re-configurable Multimedia Hardware Accelerator Using UML2.0

Multimedia stream standards evolve rapidly as stream applications prosper in embedded systems. In the developing progress of these standards, new algorithms continuously make reconfiguration or improvement on the existing ones.UML2.0 is an international unified modeling language that helps hardware design as well as software hardware co-design. As a new high-level designing method, UML becomes more and more important in the system level modeling.The paper describes a UML 2.0 based design approach to quick evaluation of implementations containing both hardware and software, By this approach, we manage to study the partitioning, reconfigurability as well as performance and hardware cost.The design specifications in UML can be translated into SystemC models consisting of simulators and synthesizable code under proper style constraints.The paper demonstrates the feasibility of quick specifications, verification, evaluation and generation of embedded system designs. These results of the thesis show that UML is capable to describe not only high level systems, but also low level hardware.The cycle accurate hardware description in UML in this thesis should deserve to be a significant novel reference for the UML design community.