Research Of The Broadband Optical Receiver Front-end Analog Circuit For Optical Interconnections

With the rapid development of the Internet of Things?IoT?,cloud computing,and fourth-generation mobile Internet,the data volume and the transmission rate grows dramatically.Due to high loss and crosstalk,the copper interconnect has become difficult to accommodate the ultra-high-speed data transmission.As an ideal alternative solution,optical interconnection,which chooses the photon as the information carrier,has many advantages,such as low loss,high bandwidth,small crosstalk and no impedance matching,et al.Therefore,it is an inevitable trend of future interconnection.Silicon compatible optical interconnects,which use the architecture similar to the integrated circuits,can significantly improve the integration,manufacturability,and extendibility by utilizing standard technology facilities,experiences,and techniques to design,fabricate,and package optoelectronic integrated circuits.It is an important breakthrough direction for the optical integration in the future.As a key block building of the optical interconnection system,the optical receiver in standard silicon-based process has become a hotspot in the field of optoelectronics.Due to the merits of small power consumption,high integration and low cost,the standard CMOS process has been commonly used to design the optical receiver analog front-end circuit.By contrast,the standard SiGe BiCMOS process has better optical properties,and provides the unique SiGe heterojunction bipolar transistor?HBT?with high transconductance and high bandwidth.Therefore,it is an ideal technology for the broadband optical receiver system.To achieve the wide-band optical receiver analog front-end circuits for the optical interconnection based on the standard silicon-based technology,the research works carried out in this thesis are as following:1.Based on UMC 0.18?m CMOS technology,a wide-band transimpedance amplifier?TIA?with parallel shunt-feedback is designed and fabricated,which includes parallel shunt-feedback input stage,common source inter-stage and output buffer with?-matched network.Experimental results shown that the parallel shunt-feedback structure extends the bandwidth to 5.2GHz,and the inverter auxiliary amplifier increases the transimpedance gain to 60.5dB?.The average equivalent input noise current is around 14.99pA/?Hz,and the fluctuation of group delay is less than50ps.When signals with data rate of 7.5-Gb/s applied on the TIA chip,the whole eye diagram is clear and symmetrical.2.Based on TSMC 0.18?m CMOS technology,a stream-mode active feedback limiting amplifier?LA?is designed and manufactured,which consists of common source amplifier,active negative feedback and negative capacitance circuit.The measured results demonstrated that the bandwidth of the limiting amplifier is up to7.1GHz,and the gain is 40.9dB.Within the-3dB bandwidth,the noise figure is about10dB and the fluctuation of group delay is less than 25ps.The output voltage swing can reach up to 1V_p-p;3.Based on IBM 0.18?m SiGe BiCMOS technology,a fully differential optical receiver analog front-end circuit is designed and optimized,including transimpedance amplifier with cascode configuration,limiting amplifier with enhanced Cherry-Hooper configuration,DC offset cancellation circuit and output buffer.Simulation results indicated that the receiver circuit has a transimpedance gain of 97dB?and a bandwidth of 11.7GHz.Within the interesting bandwidth,the equivalent input noise current density of the circuit is under 14.2pA/?Hz,and the fluctuation of group delay is less than 5ps.The output voltage swing can reach 1.1V_p-p.When the signal transmission rate is 12.5-Gb/s,the signal jitter and overshoot are small,and the input/output impedance are well matched.