Design And Implementation Of 155Mbps CMOS Limiting Amplifier For The Optical Receiver

Message exchange capacity is steadily on the increase due to the swift development of communication industry. Optic-fiber communication systems becomes the hot topic for it merits such as wide bandwidth, great capacity, little loss, anti radiation, anti corrosion and resource rich etc. The Limiting Amplifier which acts as one of main components for the use of the optical receiver that works in the optical fiber communication affects the performance of the receiver and even the whole network. It is very important for the optical fiber communication to design a limiting amplifier with high- performance.In this paper, a limiting amplifier chip is designed based on the CHARTERED 0.35μm CMOS process for the use of STM-1(155Mbps) systems under 3.3V/5V supply voltage. A multistage cascaded, differential broadband limiting amplifier effectively restrains common-mode noise. Without increasing extra power consumption and layout area, the limiting amplifier with frequency multiplier and source followers effectively expands the bandwidth. Meanwhile, a DC offset compensation circuit is designed regarding to the mismatch caused by process manufacture and layout design. In addition, a loss signal detection circuit with the programmable threshold is integrated into the chip. It can control the output buffer in according to input signal swing, and ensure that the date-process circuits such as CDR work regularly.Finally the whole layout of limiting amplifier including 12 ESDs and 12 PADs is finished, and the total area is only 1.2×1.2mm2. The post-simulated results by Hspice indicate that under 3.3V supply voltage the Limiting Amplifier has a 49.8dB IF gain and 194.5MHz -3dB bandwidth. It consumes only 82mW at static. With a wide input dynamic range of from 18mVpp to 1.8Vpp, it can contain a constant output swing of 980mV and achieve a good output eye diagram. The Limiting Amplifier designed in the thesis used for the optical fiber communication can meet the application requirements of STM-1(155Mbps) rate which is the most basic and the most important. Thus A chip with high performance succeeds in being realized.