Design And Implementation Of Limiting Amplifier In 1.25Gbps Optical Receiver

Information technology has brought giant convenience to human society in the past two decades of its development.Requirements of communication technology on speed and dependability are gradually enhanced and greatly promote the development of new technologies in the industry for achieving requests of information interaction,among which optical fiber communication technology is the communication methods which is used most often.On one hand,optical fiber communication has the ability to transmit for a long distance,store mass of data and transmit for a low-loss,on the other hand,it has strong ability of anti-corrosion and anti-interference.The raw materials for manufacturing are very rich.Therefore,CMOS optical communication IC based on silicon substrate becomes hot and has a great demand caused by its low cost and high integration.Since limiting amplifier(LA)acts as substantial of optical fiber communication system,its performance directly affects the performance of optical receiver and optical fiber system.Stm-8 rate optical receiver circuit is widely used in access network.It is of great significance to design a stm-8 rate limiting amplifier for the construction of information superhighway in China.The limiting amplifier chip is designed based on low-cost 0.35um CMOS process.In order to make the signal transmission bandwidth meet the requirements,the limiting amplifier uses the bandwidth technology of capacitive negative feedback to improve the transmission speed.At the same time,a fully symmetrical structure is adopted in the layout design,and the parasitic parameters are optimized reasonably.In order to improve the voltage range of the limiting amplifier,a linear voltage regulator is designed to supply power to the core module,which makes the operating voltage range of the chip reach 3 V to 5.5V.Because the change of temperature will reduce the performance,a bandgap reference with positive temperature coefficient current source is designed to compensate for the loss of gain at high temperature.In order to overcome the influence of offset on the working point of the circuit,a DC offset compensation circuit is designed.Finally,in order to avoid the influence of noise,a signal loss silence circuit is designed in the chip.When the input signal is too small,the limiting amplifier stops working.This subject completed the circuit design,simulation,layout design and testing of the limiting amplifier.The simulation results show that under the worst conditions of PVT(process,voltage,temperature),the small signal gain of the limiting amplifier used for STM-8 rate can reach 54dB,the small signal bandwidth(-3dB)is 950MHz,and the differential output peak-to-peak value is 1.4V,and the static power consumption is 56mA.In the test,eye diagram and bit error rate meet the requirements of STM-8.