Design Of Front-end Circuit Of Inductorless High-speed CMOS Optical Receiver For Optical Interconnects

With the continuous increase of data rate,optical interconnects has aroused great interest.Compared with electrical interconnects,optical interconnects has significant advantages in crosstalk,bandwidth,distance and delay.Due to these advantages of optical interconnects,it has gradually developed into one of the most commonly used high-speed communication systems.In the integration of chips,although the CMOS process is not as fast as the Ge Si process,it has the advantages of low-price,easy-foundry,high integration,and low power consumption.In recent years,with the continuous reduction of the feature size of the CMOS process,overcoming the defects the CMOS process itself to complete the design of high-speed photoelectric transceivers have become a current research hotspot.The design goal of this thesis is to design an inductorless 20Gb/s optical receiver analog front-end circuit based on the TSMC 65nm CMOS process,which mainly includes transimpedance amplifier,limiting amplifier and output buffer circuit.This design proposes an improved regulated cascode transimpedance amplifier.Compared with the traditional regulated cascode(RGC)transimpedance amplifier,by adding a positive feedback amplifier and PMOS transistor,can further reduce the input impedance of the circuit and improve the bandwidth of the amplifier effectively to meet the requirements of higher data rates;on the side of the limiting amplifier,the core amplifier stage of this design adopts a fourth-order nested feedback circuit structure,can reduce the equivalent impedance of the node of the amplifier,which is beneficial to separation of poles to increase the gain bandwidth product of the circuit,so as to achieve high gain and high bandwidth without inductor;the output buffer circuit uses an f _T multiplier circuit,which can reduce the equivalent input capacitance of the circuit while improving the driving ability,thereby reducing the impact on the bandwidth of the previous stage circuit.The post-simulation results show that,the transimpedance gain of the optical receiver front-end circuit designed in this thesis is 77dB,the-3dB bandwidth is 17.5GHz,and the equivalent input noise current is 25.6pA/(?)@17.5GHz,The power consumption is 86.9mW and the sensitivity is 100?A.When the PVT changes,the eye pattern is well opened and the output swing exceeds 250m V.Since the optical receiver analog front-end circuit does not use an inductor,the layout area is only 250?m×150?m.