The Research And Design Of A 10-Bit High Speed DAC

DAC is widely used in digital processing system. The trends of VLSI, Mixed Signal and SOC integrated circuits demand high performance DAC, for instance, higher speed, higher resolution, lower power dissipation and supply voltage. This paper presents the general design methodology and the process of high-speed D-A converter and accomplishes the circuit design of a 10-bit 10MS/s D-A converter. Emphasis is put on design and simulation. The DAC consists of analog circuit blocks and digital circuit blocks, so it is a mixed signal circuit. Because the digital part is simple comparatively, we use the same method as analog part to design it.Comparing with voltage-domain D-A converter and charge-domain D-A converter, current-steering D-A converter has its high-speed superiority, which is only influenced by the speed of current switch. Because the structure is based on current replication while not on current division, it can overcome the defects of current-domain D-A converter. Meanwhile, considering of accuracy, complexity and speed, a 6+4 segmented architecture is presented. To enhance the speed performance and reduce error and area of DAC, the 6 MSBs are thermometer-decoded, and the 4 LSBs are binary-weighted. The mode of inputs and outputs is confirmed to be parallel-input and complementary current-output. High–speed synchronized latch circuit and special clock driver are used, which adapt to the requirement of quick data-transformation with high accuracy and low power.The CMOS technology is better than bipolar technology, which help the circuit get lower power, so it is adopted. The HSpice is used for DAC circuit simulation with TSMC 0.18μm BSIM3(V3.1)CMOS model.The current in the DAC's output can drive the load, and the structure can save a buffer consisted of operational amplifier, so the structure can achieve high speed with no close-loop and feedback in this circuit. The simulation results in this thesis indicate that, its settling-time to full swing is 15ns with 3V supply, the total static power dissipation is less than 50mW, the differential nonlinearity error is 0.58LSB, the integral nonlinearity error is 0.54 LSB, spurious free dynamic range is more than 60dB, and the output current can be adjusted. The result meets the design...