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Design And Implementation Of The Pre-Processing And Peripheral Interfaces Of An Infrared Image Information Processing System

Posted on:2006-08-31Degree:MasterType:Thesis
Country:ChinaCandidate:H ZhengFull Text:PDF
GTID:2178360185463329Subject:Information and Communication Engineering
Abstract/Summary:PDF Full Text Request
With the development of infrared thermal imaging technology, uncooled infrared censor has been used in more and more fields. And with the development of FPGA technology, FPGA has become the first choice of most hardware designers. We design an uncooled infrared image information process system with FPGA and DSP, and all peripheral functions are implemented on FPGA.Based on the structure and work flow of the system, the thesis describes the design of the communication interface between the uncooled infrared censor and FPGA, then describes the image pre-process module. In this module, we focus on an improved 2-D median-filter and a real time edge detect algorithm which has very regular computational structure. In chapter 4, we use FPGA to capture the image data from infrared sensor and create the synchronization signal and output the video to monitor. Chapter 5 describes the design of communication interface between DSP, FPGA and missile control system, and focus on a new Verilog description style called Cycle Accurate, and finally we design an I2C bus using this description style. In the end of this thesis, we summarize all works of this thesis.All design in this thesis has been synthesized implemented on FPGA.
Keywords/Search Tags:Image acquisition, Median-filter, Edge detection, Video output, McBSP, HDLC, I~2C, Cycle accurate, FPGA
PDF Full Text Request
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